電子信息工程專業(yè)外文翻譯----一個(gè)高效率的cmos超寬帶信號(hào)產(chǎn)生模塊（英文）

1、A Power-Efficient CMOS UWB Signal-Generation Module Rui Xu, Yalin Jin, and Cam Nguyen? Department of Electrical and Computer Engineering Texas A&M University, College Station, Texas 77843, USA Abstract This paper pr

2、esents a new carrier-based ultra-wideband (UWB) transmitter architecture and its CMOS implementation. The new transmitter topology adopts a double-stage switching to enhance RF-power efficiency, reduce dc-power consump

3、tion and circuit complexity. Fabricated using a 0.18-μm CMOS process, the UWB signal generation module includes an UWB sub-nanosecond-switching single-pole single-throw (SPST) switch and a tunable impulse generator.

4、 Measurement results show that the generated UWB signal has variable 10-dB signal bandwidths from 0.5 to 4 GHz and tunable central frequency covering the entire UWB frequency range of 3.1 to 10.6 GHz. The CMOS module

5、consumes less than 2 mW DC power. The proposed carrier-based UWB transmitter and the demonstrated module provide an attractive means for UWB signal generation for both UWB communications and radar applications. 1. Intr

6、oduction Ultra-wideband (UWB) technology has received significant interests, particularly after the FCC’s Notice of Inquiry in 1998 [1] and Report and Order in 2002 [2] for unlicensed uses of UWB devices within the 3.1

7、–10.6 GHz frequency band. UWB techniques are promising technology, capable of both accurate position location and high-rate, short- range ad-hoc networking as well as high-resolution sensing. Carrier-based UWB signals

8、have been widely used in various radar and communication applications [3]–[4]. They hold the advantage of more convenient spectrum management and less distortion through antennas [5]. In typical UWB transmitters, the g

9、enerated carrier-based UWB voltage signal needs to be sent to a wideband power amplifier (PA) to achieve the required power level. This approach suffers from two major disadvantages: the design challenges of a UWB PA

10、and low power efficiency in low pulse repetition frequency (PRF) situation. In this paper, we propose a new architecture for carrier-based UWB transmitter that is not only power-efficient, but also reduces circuit com

11、plexity [6]. We also demonstrate the Fig. 1. The proposed carrier-based UWB transmitter topology. 321 1-4244-0878-4/07/$20.00 ©2007 IEEE[7]. This method of pulse generation is especially attractive for the proposed

12、 transmitter because it can provide full voltage swing required for the SPST switch operation. 5. Measurement Results The CMOS pulse generator-SPST switch chip was used in conjunction with an external frequency synthe

13、sizer to demonstrate the new carrier-based UWB transmitter. The CMOS chip’s microphotograph is displayed in Fig. 4. The die area of the entire circuit is 850 μm by 700 μm, including the input and output on-wafer pads.

14、 Under a 1.8-V supply voltage, the whole module consumes less than 1-mA DC current. Fig.5 (a) displays the time-domain waveform of a UWB signal with 2-ns duration and 5- GHz center frequency. The signal amplitude is 2-V

15、p-p (peak-to- peak). By increasing the external biasing voltage for the pulse generator, the pulse width of the UWB signal can be reduced. When the pulse width is reduced to a certain value, the amplitude of the Fig.3.

16、 CMOS impulse generation using digital logics. -1.5-1-0.500.511.50 4 8 12 16 20Time (ns)Amplitude (V)Frequency (GHz)Amplitude (dBm)(a)

17、 (b) Fig. 5. (a) Measured time-domain UWB signal with 0.5-ns duration. (b) Measured spectrums of UWB signals covering the 3.1-10.6 GHz UWB band. Fig.4. Microphotograph of the 0.18-μm CMOS chip integrating the pulse gene