基于armesl平臺(tái)的h.264與avs雙解碼軟硬件協(xié)同設(shè)計(jì)和研究

1、上海交通大學(xué)碩士學(xué)位論文基于ARM ESL平臺(tái)的H.264與AVS雙解碼軟硬件協(xié)同設(shè)計(jì)和研究姓名：何穎天申請(qǐng)學(xué)位級(jí)別：碩士專業(yè)：軟件工程指導(dǎo)教師：祝永新200711016Research of SW/HW Co-design of Unified Decoder for H.264 and AVS based on ARM ESL Platform ABSTRACT High definition H.264 video technol

2、ogy is widely used nowadays, but the payment for the license fee is huge. AVS video standard is published, therefore there are more and more researche efforts in H.264 and AVS, one target is to achieve the high speed of

3、decompression on the basis of ensuring the encoding quality is not influenced. We propose a new hardware/software co-design method based on ARM ESL platform. This method is used to design and verify H.264 and AVS video d

4、ecoder via simulation. In HW/SW partitions, the luminance interpolation is implemented in hardware with combination of the half and quarter-interpolation. The functions of loopfilter in H.264 and AVS are combined. This p

5、aper also presents the improvement of loopfilter hardware architecture and the incorporation of DMA Controller. All these lead to better overall system performance. In the experiments, we compare the simulation performan

6、ce of decoder implementations to decode an AVS stream whose resolution is 720x576. These implementations include the pure software versus the SW/HW partitions. The results show that SW/HW partitions solution provides bet

7、ter overall performance. We believe our work serves as a useful reference for AVS designs with HW/SW partitions. The major target of the project is to evaluate overall real time performance of the decoder at system level