外文翻譯---topswitch系列三端離線式pwm開(kāi)關(guān)

1、<p><b>　　附 錄</b></p><p><b>　　附錄A 英文原文</b></p><p>　　TOPSwitch FamilyThree-terminal Off-line PWM Switch</p><p>　　TOPSwitch device belongs to three-line P

2、WM switch. It is a new type of IC which merges PWM and MOSFET. It has many advantages: small volume, light weight,high density and low cost. High frequency switching power supply made from it can no t only simplify the c

3、ircuit, but also can imp rove the EMC characteristics and reduce the cost.</p><p>　　The TOPSwitch family implements, with only three pins, allfunctions necessary for an off-line switched mode control system:

4、 high voltage N-channel power MOSFET with controlled turn-on gate driver, voltage mode PWM controller with integrated 100 kHz oscillator, high voltage start-up bias circuit,bandgap derived reference, bias shunt regulato

5、r/error amplifier for loop compensation and fault protection circuitry. Compared to discrete MOSFET and controller or self oscillating (RCC) switching conver</p><p>　　Pin Functional Description</p>&l

6、t;p>　　DRAIN Pin:</p><p>　　Output MOSFET drain connection. Provides internal bias current during start-up operation via an internal switched highvoltage current source. Internal current sense point.</p&

7、gt;<p>　　CONTROL Pin:</p><p>　　Error amplifier and feedback current input pin for duty cycle control. Internal shunt regulator connection to provide internal bias current during normal operation. Trig

8、ger input for latching shutdown. It is also used as the supply bypass and auto-restart/ compensation capacitor connection point.</p><p>　　SOURCE Pin:</p><p>　　Output MOSFET source connection. Pr

9、imary-side circuit common, power return, and reference point.</p><p>　　TOPSwitch Family Functional Description</p><p>　　TOPSwitch is a self biased and protected linear control current-to-duty cy

10、cle converter with an open drain output. High efficiency is achieved through the use of CMOS and integration of the maximum number of functions possible. CMOS significantly reduces bias currents as compared to bipolar or

11、 discrete solutions. Integration eliminates external power resistors used for current sensing and/or supplying initial start-up bias current. During normal operation, the internal output MOSFET duty cycle l</p>&l

12、t;p>　　Control Voltage Supply</p><p>　　CONTROL pin voltage VC is the supply or bias voltage for the controller and driver circuitry. An external bypass capacitor closely connected between the CONTROL and S

13、OURCE pins is required to supply the gate drive current.</p><p>　　The total amount of capacitance connected to this pin (CT) also sets the auto-restart timing as well as control loop compensation. VC is regu

14、lated in either of two modes of operation. Hysteretic regulation is used for initial start-up and overload operation. Shunt regulation is used to separate the duty cycle error signal from the control circuit supply curre

15、nt. During start-up, VC current is supplied from high-voltage switched current source connected internally between the DRAIN and CONTROL pi</p><p>　　TOPSwitch Family Functional Description (cont.)</p>

16、<p>　　The first time VC reaches the upperthreshold, the high-voltage currentsource is turned off and the PWM modulator and output transistor areactivated, as shown in Figure 5(a). During normal operation (when the

17、output voltage is regulated) feedback control current supplies the VC supply current. The shunt regulator keeps VC at typically 5.7 V by shunting CONTROL pin feedback current exceeding the required DC supply current thro

18、ugh the PWM error signal sense resistor RE. The low dynamic impedance of</p><p>　　Pulse Width Modulator</p><p>　　The pulse width modulator implements a voltage-mode control loop by driving the o

19、utput MOSFET with a duty cycle inversely proportional to the current flowing into the CONTROL pin. The error signal across RE is filtered by an RC network with a typical corner frequency of 7 kHz to reduce the effect of

20、switching noise. The filtered error signal is compared with the internal oscillator sawtooth waveform to generate the duty cycle waveform. As the control current increases, the duty cycle decreases. </p><p>

21、　　consumption of the TOPSwitch independent of the error signal. Note that a minimum current must be driven into the CONTROL pin before the duty cycle begins to change.</p><p>　　Gate Driver</p><p&g

22、t;　　The gate driver is designed to turn the output MOSFET on at a controlled rate to minimize common-mode EMI. The gate drive current is trimmed for improved accuracy.</p><p>　　Error Amplifier</p><

23、;p>　　The shunt regulator can also perform the function of an error amplifier in primary feedback applications. The shunt regulator voltage is accurately derived from the temperature compensated bandgap reference. The

24、gain of the error amplifier is set by the CONTROL pin dynamic impedance. The CONTROL pin clamps external circuit signals to the VC voltage level. The CONTROL pin current in excess of the supply current is separated by th

25、e shunt regulator and flows through RE as the error signal</p><p>　　Cycle-By-Cycle Current Limit</p><p>　　The cycle by cycle peak drain current limit circuit uses the output MOSFET ON-resistance

26、 as a sense resistor. A current limit comparator compares the output MOSFET ON-state drain-source voltage, VDS(ON), with a threshold voltage. High drain current causes VDS(ON) to exceed the threshold voltage and turns th

27、e output MOSFET off until the start of the next clock cycle. The current limit comparator threshold voltage is temperature compensated to minimize variation of the effective peak current limit</p><p>　　Gener

28、al Circuit Operation</p><p>　　Primary Feedback Regulation</p><p>　　The circuit shown in Figure 7 is a simple 5 V, 5 W bias supply using the TOP200. This universal input flyback power supply empl

29、oys primary-side regulation from a transformer bias winding. This approach is best for low-cost applications requiring isolation and operation within a narrow range of load variation. Line and load regulation of ?5% or b

30、etter can be achieved from 10% to 100% of rated load. Voltage feedback is obtained from the transformer (T1) bias winding, which eliminates the need for </p><p>　　Simple Optocoupler Feedback</p><p

31、>　　The circuit shown in Figure 8 is a 7.5 V, 15 W secondary regulated flyback power supply using the TOP202 that will operate from 85 to 265 VAC input voltage. Improved output voltage accuracy and regulation over the

32、circuit of Figure 7 is achieved by using an optocoupler and secondary referenced Zener diode. The general operation of the power stage of this circuit is the same as that described for Figure 7. The input voltage is rect

33、ified and filtered by BR1 and C1. L2, C6 and C7 reduce conducted e</p><p>　　Accurate Optocoupler Feedback</p><p>　　The circuit shown in Figure 9 is a highly accurate, 15 V, 30 W secondaryregulat

34、ed flyback power supply that will operate from 85 to 265 VAC input voltage. A TL431 shunt regulator directly senses and accurately regulates the output voltage. The effective output voltage can be fine tuned by adjusting

35、 the resistor divider formed by R4 and R5. Other output voltages are possible by adjusting the transformer turns ratios as well as the divider ratio. The general operation of the input and power stages</p><p&g

36、t;<b>　　附錄B 漢語(yǔ)翻譯</b></p><p>　　TOPSwitch系列三端離線式PWM開(kāi)關(guān)</p><p>　　TOPSwitch器件為三端單片開(kāi)關(guān)電源, 是一種將PWM和MOSFET合二為一的新型集成芯片。與普通線性穩(wěn)壓電源相比其優(yōu)點(diǎn)為體積小、重量輕, 并且密度高、價(jià)格低; 采用它制作高頻開(kāi)關(guān)電源, 不僅簡(jiǎn)化了電路, 同時(shí)可以改善電源的電磁兼容性能,

37、 且降低了制作成本。</p><p>　　TOPSwitch系列（僅用三個(gè)引腳）實(shí)現(xiàn)了離線開(kāi)關(guān)式控制系統(tǒng)所必需的所有功能：帶受控導(dǎo)通門(mén)驅(qū)動(dòng)器的高壓N溝道功率MOSFET ；集成了100KHz振蕩器的電壓模式PWM控制器；高壓?jiǎn)?dòng)偏置電路；基準(zhǔn)電壓參考點(diǎn)；偏置并聯(lián)穩(wěn)壓器/誤差放大器 用于環(huán)路補(bǔ)償和故障保護(hù)電路。相比 離散的MOSFET和控制器或自振蕩（RCC）開(kāi)關(guān)轉(zhuǎn)換器的解決方案，TOPSwitch集成電路可以降低

38、總成本，元件數(shù)量，尺寸，重量同時(shí)提高了效率和系統(tǒng)的可靠性。這些設(shè)備用于在0到100瓦（普通0到50瓦）范圍內(nèi)提供100/110/230伏離線電源和在0到150瓦范圍提供230/277伏離線功率因數(shù)校正（PFC）功能。</p><p><b>　　圖1 典型應(yīng)用</b></p><p><b>　　圖2 功能塊圖</b></p>&l

39、t;p><b>　　腳功能描引述</b></p><p><b>　　漏引腳</b></p><p>　　輸出MOSFET的漏極連接。在啟動(dòng)過(guò)程中通過(guò)一個(gè)內(nèi)置的開(kāi)關(guān)高壓電流源提供內(nèi)部偏置電流，內(nèi)部電流檢測(cè)點(diǎn)。</p><p><b>　　控制引腳</b></p><p>

40、　　誤差放大器和用于工作周期控制的反饋電流輸入引腳 。內(nèi)部并聯(lián)穩(wěn)壓器在正常運(yùn)行期間提供內(nèi)部 偏置電流。關(guān)斷觸發(fā)脈沖輸入。它也可以用來(lái)作為電源旁路和自動(dòng)重新啟動(dòng)/補(bǔ)償電容連接點(diǎn)。</p><p><b>　　源極引腳</b></p><p>　　MOSFET的電源輸出接點(diǎn)。一次側(cè)電路的公共點(diǎn)，能量回饋和參考點(diǎn)。</p><p><b>

41、　　圖3 管腳排列</b></p><p>　　TOPSwitch系列的功能描述</p><p>　　圖4 占空比與控制極引腳電流的關(guān)系</p><p>　　TOPSwitch是一個(gè)具有開(kāi)漏輸出結(jié)構(gòu)的自偏置和自我保護(hù)的線性頻寬電流控制器。 CMOS的使用和最大化的功能集成度使之更高效。相比雙極性或者離散解的方法CMOS極大地減小了偏置電流。它的集成性消

42、除了用于電流檢測(cè)和/或提供初始啟動(dòng)偏置電流的外部功率電阻器如圖4所示，在正常運(yùn)行期間，內(nèi)部輸出MOSFET的占空比隨著控制極引腳電流的增大而呈線性減小。為了實(shí)現(xiàn)所有要求的控制、偏置和保護(hù)功能，漏極和控制極引腳都分別執(zhí)行如下所描述的功能。參見(jiàn)圖2 的方框圖和圖6 TOPSwitch集成電路的時(shí)間電壓波形圖。</p><p><b>　　控制電壓供應(yīng)</b></p><p&g

43、t;　　控制引腳電壓VC 是控制器和驅(qū)動(dòng)電路的電壓源或偏置電壓源。緊密聯(lián)系控制極和源極引腳的外部旁路電容是提供門(mén)驅(qū)動(dòng)電流所必要的。</p><p>　　圖5 正常運(yùn)行（a）和自動(dòng)重啟（b）的初始階段波形</p><p>　　連接于此引腳的總電容（CT）同時(shí)也設(shè)置了自動(dòng)重啟時(shí)間和控制回路補(bǔ)償。Vc被限定于兩種運(yùn)行模式之一。 滯后調(diào)節(jié)用于初始啟動(dòng)和過(guò)載運(yùn)行。分流穩(wěn)壓器用于分散工作周期內(nèi)來(lái)自于控

44、制電路的電源電流的誤差信號(hào)。在啟動(dòng)時(shí)，VC電流來(lái)自于一個(gè)內(nèi)在地連接于漏極和控制極引腳的高壓開(kāi)關(guān)電流源。電流源)提供.足夠的電流以供應(yīng)控制電路系統(tǒng)同時(shí)為外部總電容器（CT）充電。</p><p>　　TOPSwitch系列功能描述（續(xù)）</p><p>　　如圖5（a）所示， VC第一次達(dá)到上限值時(shí)，高壓電流源被關(guān)閉，同時(shí)PWM調(diào)節(jié)器和功率晶體管被激活。在正常運(yùn)行期間（調(diào)節(jié)輸出電壓時(shí)）反饋控

45、制電流為VC提供電流。當(dāng)控制引腳的反饋電流超過(guò)PWM誤差檢測(cè)電阻Re上的直流電流時(shí)，并聯(lián)穩(wěn)壓器通過(guò)分流使VC保持在5.7伏。當(dāng)用于初級(jí)反饋結(jié)構(gòu)時(shí),這個(gè)引腳的低動(dòng)態(tài)阻抗（ZC）設(shè)定誤差信號(hào)放大器的增益?？刂茦O引腳的動(dòng)態(tài)阻抗連同外部電阻和電容共同決定了電源系統(tǒng)的控制環(huán)路補(bǔ)償。當(dāng)控制極引腳的外部電容（CT）需要放電到下限值時(shí)，功率MOSFET會(huì)關(guān)閉并且控制電路會(huì)置于低電流的待機(jī)模式。高壓電流源開(kāi)啟，并再次為外部電容充電。如圖6，充電電流顯示為

46、正極性，放電電流顯示為負(fù)極性。如圖5（b）所示，遲滯自動(dòng)重啟比較器通過(guò)開(kāi)啟和關(guān)閉高壓電流源，將VC限定在4.7到5.7伏的范圍內(nèi)。自動(dòng)重啟電路有一個(gè)8位分頻計(jì)數(shù)器，這個(gè)分頻計(jì)數(shù)器可以防止功率MOSFET在8個(gè)充放電周期完成前再次開(kāi)啟。通過(guò)縮短自動(dòng)重啟周期至原來(lái)的5%，這個(gè)計(jì)數(shù)器有效的降低了TOPSwitch的功耗。自動(dòng)重啟不斷循環(huán)，直到再次出現(xiàn)輸出電壓調(diào)節(jié)。</p><p><b>　　脈寬調(diào)制器<

47、;/b></p><p>　　脈寬調(diào)制器用一個(gè)工作周期（與流經(jīng)控制極引腳的電流成反比）驅(qū)動(dòng)功率MOSFET實(shí)現(xiàn)了電壓型控制環(huán)路。通過(guò)電阻Re的誤差信號(hào)被Rc網(wǎng)路以7kHz的角頻率過(guò)濾掉，從而降低了開(kāi)關(guān)噪聲的影響。過(guò)濾后的誤差信號(hào)與內(nèi)部振蕩器的鋸齒型電壓相比較，來(lái)產(chǎn)生工作周期的電壓波形。工作周期的占空比隨著控制電流的增大而降低。來(lái)自于振蕩器的時(shí)鐘信號(hào)設(shè)定了一個(gè)開(kāi)啟功率MOSFET的鎖存信號(hào)。脈寬調(diào)制器關(guān)閉功率

48、MOSFET時(shí)，重新設(shè)定鎖存信號(hào)。最大占空比則是由內(nèi)部震蕩器的對(duì)稱性決定的。脈寬調(diào)制器有一個(gè)最小的作用時(shí)間以保持TOPSwitch的電流消耗獨(dú)立于誤差信號(hào)。注意，當(dāng)占空比改變前最小電流必須到達(dá)控制極引腳。</p><p><b>　　柵極驅(qū)動(dòng)器</b></p><p>　　柵極驅(qū)動(dòng)器設(shè)計(jì)目的是，用一個(gè)可控速率開(kāi)啟功率MOSFET以盡量減少共模電磁干擾。柵極驅(qū)動(dòng)電流經(jīng)整

49、定以提高其精確性。</p><p><b>　　誤差放大器</b></p><p>　　在初級(jí)反饋應(yīng)用中，并聯(lián)穩(wěn)壓器也可以起誤差放大器的作用。并聯(lián)穩(wěn)壓器電壓只來(lái)自于溫度補(bǔ)償?shù)膸痘鶞?zhǔn)電壓。誤差信號(hào)放大器的增益由控制及引腳的動(dòng)態(tài)電阻決定?？刂茦O引腳夾外部電路向Vc發(fā)出電壓等級(jí)信號(hào)。當(dāng)控制極引腳電流超過(guò)電流源電流時(shí)，將被并聯(lián)穩(wěn)壓器分流并作為誤差信號(hào)流經(jīng)Re。</p&

50、gt;<p><b>　　逐周期電流限制</b></p><p>　　出現(xiàn)周期性峰值的漏極限流電路使用功率MOSFET的導(dǎo)通電阻作為檢測(cè)電流。電流限幅儀將功率MOSFET的通態(tài)漏極源電壓VD（ON）與臨界電壓相比較。過(guò)高的漏極電流會(huì)使VDS(ON)超過(guò)臨界電壓，并關(guān)閉功率MOSFET直到下一個(gè)時(shí)鐘周期的開(kāi)始。由于溫度的變化而導(dǎo)致的功率MOSFET RD(ON)的變化，而RD(O

51、N)的變化會(huì)引起有效峰值電流的波動(dòng)。電流限幅儀的臨界電壓正是減弱這種波動(dòng)的溫度補(bǔ)償。前沿閘電路會(huì)在功率MOSFET開(kāi)啟后較短的時(shí)間內(nèi)對(duì)電流限幅儀加以限制。對(duì)前沿截止時(shí)間提前設(shè)定，這樣由初級(jí)側(cè)電容和次級(jí)側(cè)整流器的反向恢復(fù)時(shí)間引起的電流脈沖尖波將不會(huì)使開(kāi)關(guān)脈沖過(guò)早終止。</p><p><b>　　關(guān)斷/自動(dòng)重啟</b></p><p>　　為了盡量降低TOPSwitch

52、的功率損耗，當(dāng)失控狀態(tài)持續(xù)存在的話，關(guān)斷/重啟電路將會(huì)以20倍于正常狀態(tài)的頻率通斷電源供應(yīng)。失控狀態(tài)將中斷外部電流流經(jīng)控制極引腳。如上所述，VC的調(diào)節(jié)將由分流模式轉(zhuǎn)變?yōu)闇笞詣?dòng)重啟模式。當(dāng)故障狀態(tài)清除以后，電源輸出轉(zhuǎn)為可控，VC調(diào)節(jié)恢復(fù)分流模式，電源恢復(fù)正常運(yùn)行。</p><p><b>　　閉鎖關(guān)斷</b></p><p>　　輸出過(guò)電壓保護(hù)被控制極引腳的強(qiáng)電流脈沖

53、激活。鎖存器一旦設(shè)定以后，它將會(huì)關(guān)閉TOPSwitch的輸出。通過(guò)清除和重新儲(chǔ)存輸入能量來(lái)激活上電復(fù)位電路，或者瞬時(shí)將控制極引腳電流降到上電復(fù)位的臨界值以下，同時(shí)將TOPSwitch置于正常運(yùn)行狀態(tài)下。當(dāng)電源被鎖定以后,VC將被控制在滯后模式。</p><p><b>　　過(guò)熱保護(hù)</b></p><p>　　熱保護(hù)由一個(gè)精準(zhǔn)的模擬電路來(lái)提供,此電路將在節(jié)點(diǎn)溫度超過(guò)熱

54、關(guān)斷溫度值(一般為145攝氏度)的時(shí)候關(guān)閉MOSFET。通過(guò)清除和重新儲(chǔ)存輸入能量來(lái)激活上電復(fù)位電路，或者瞬時(shí)將控制極引腳電流降到上電復(fù)位的臨界值以下，同時(shí)將TOPSwitch置于正常運(yùn)行狀態(tài)下。當(dāng)電源被鎖定以后,VC將被置于滯后模式。</p><p><b>　　高壓偏置電流源</b></p><p>　　在啟動(dòng)或者之后運(yùn)行時(shí),這個(gè)電流源使TOPSwitch偏離漏極

55、引腳,并為控制極引腳連接的外部電容(CT)充電。滯后運(yùn)行出現(xiàn)在自動(dòng)重啟和閉鎖關(guān)斷的時(shí)候。這個(gè)電流源以有效周期大約35%的時(shí)間開(kāi)斷。這個(gè)工作周期由控制引腳的沖電電流(IC)和放電電流(ICD1和ICD2)的比率來(lái)決定。當(dāng)功率MOSFET切換的時(shí)候，這個(gè)電流源會(huì)在正常運(yùn)行時(shí)關(guān)斷。</p><p>　　圖6 正常運(yùn)行(1)、自動(dòng)重啟(2)、閉鎖關(guān)斷(3)和掉電重啟(4)的典型波形</p><p&g

56、t;<b>　　電路工作介紹</b></p><p><b>　　初級(jí)反饋調(diào)節(jié)</b></p><p>　　圖7所示電路是一個(gè)簡(jiǎn)單的5伏、5瓦的偏置電源，用于TOP200。這個(gè)通用反饋輸入電源采用來(lái)自變壓器偏置繞組的初級(jí)端調(diào)節(jié)。此方法最適于在絕緣要求低和運(yùn)行負(fù)載變化范圍窄的情況下的應(yīng)用。在負(fù)載為額定載的10% 到 100%之間時(shí)，電源負(fù)載調(diào)節(jié)達(dá)&

57、#177;5%或者更精確是能夠達(dá)到的。電壓反饋從變壓器（T1）的偏置繞組獲得，這樣就不再需要光耦合器和次級(jí)誤差放大器了。高壓電流加到T1的一次繞組上。變壓器一次側(cè)的另一邊由TOP200 里集成的高壓MOSFET晶體管（U1）驅(qū)動(dòng)。TOP200的內(nèi)部振蕩器規(guī)定了電路以100kHz的轉(zhuǎn)換速度運(yùn)行。鉗位電路由VR1實(shí)現(xiàn)，D1則將由變壓器漏電感引起的前沿電壓尖峰限制在一個(gè)安全值上。二次繞組經(jīng)D2、C2、C3、L1整流和濾波來(lái)產(chǎn)生5伏的輸出電壓。

58、T1偏置繞組的輸出電壓經(jīng)過(guò)了D3、R1和C5的整流和濾波。C5上的電壓由U1來(lái)控制，并且由U1控制引腳的5.7伏內(nèi)置并聯(lián)穩(wěn)壓器決定。當(dāng)C5上的整流偏置電壓開(kāi)始超過(guò)并聯(lián)穩(wěn)壓器的電壓時(shí)，電流將會(huì)流入控制引腳。在達(dá)到穩(wěn)定工作點(diǎn)之前，不斷增長(zhǎng)的控制引腳電流會(huì)縮短工作周期。輸出電壓和偏置電壓成正比，比例由輸出線圈和偏置繞組的變比確定。C5</p><p>　　參看表DN-8，獲取更多有關(guān)TOP200在偏置電源方面應(yīng)用的信息

59、。</p><p>　　圖7 基于TOP200的包含最少元件的5伏、5瓦偏置電源原理圖</p><p>　　圖8 基于TOP202和簡(jiǎn)單光耦合器反饋的15瓦通用輸入電源原理圖</p><p><b>　　簡(jiǎn)單光耦反饋</b></p><p>　　圖8所示電路時(shí)一個(gè)7.5伏、15瓦的二級(jí)調(diào)節(jié)回掃電源，該電源實(shí)用的TOP

60、202運(yùn)行于85到265伏的交流電壓下。通過(guò)實(shí)用光耦合器和次級(jí)穩(wěn)壓二極管改良了輸出電壓精度和圖7所示電路的控制。此電路通常的運(yùn)行電壓等級(jí)和圖7中所描述的一樣。輸入電壓經(jīng)過(guò)了BR1和C1的整流和濾波。L2、C6和C7降低了發(fā)射電流。偏置繞組經(jīng)D3和C4的整流和濾波產(chǎn)生了11伏的額定偏置電壓。穩(wěn)壓二極管（VR2）電壓和光耦合器中LED的前向電壓共同決定了輸出電壓。R1、光耦合電流傳輸比和TOPSwitch控制電流工作周期傳遞函數(shù)設(shè)定了直流控

61、制回路增益。C5和控制引腳的動(dòng)態(tài)阻抗以及電容的等效串聯(lián)電阻值建立了一個(gè)控制回路零點(diǎn)。當(dāng)電流過(guò)低時(shí)，R2和VR2提供小負(fù)荷電流。參看DN-11，以獲得更多有關(guān)TOP202在低耗、15瓦通用電源方面應(yīng)用的信息。</p><p><b>　　精確光耦反饋</b></p><p>　　圖9所示電路是一個(gè)高精度、15伏、30瓦的二次調(diào)節(jié)回掃電源，該電源工作在85到265伏的交流

62、電壓下。一個(gè)TL431并聯(lián)穩(wěn)壓器直接檢測(cè)并精確調(diào)節(jié)輸出電壓。通過(guò)調(diào)整由R4和R5組成的電阻分割器，能夠?qū)τ行л敵鲭妷哼M(jìn)行微調(diào)。其它輸出電壓可以通過(guò)調(diào)整變壓器的變比和分壓器的分壓比來(lái)進(jìn)行調(diào)整。這個(gè)電路的一般的輸入運(yùn)行周期和電壓等級(jí)和圖7和圖8中所描述的一樣。R3和C5調(diào)節(jié)頻率響應(yīng)。TL431（U2）通過(guò)控制光耦合器LED的電流（和TOPSwitch的占空比）調(diào)節(jié)輸出電壓，以維持TL431輸入引腳的平均電壓在2.5伏。R4和R5組成的電阻分