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1、一篇關(guān)于單片機(jī)的英文文獻(xiàn)一篇關(guān)于單片機(jī)的英文文獻(xiàn)(上)ValidationTestingofDesignHardeningfSingleEventEffectsUsingthe8051MicrocontrollerAbstractAbstractWiththedearthofdedicatedradiationhardenedfoundriesnewnoveltechniquesarebeingdevelopedfhardeningde
2、signsusingnondedicatedfoundryservices.Inthispaperwewilldiscusstheimplicationsofvalidatingthesemethodsfthesingleeventeffects(SEE)inthespaceenvironment.Topicsincludethetypesofteststhatarerequiredthedesigncoverage(i.e.desig
3、nlibraries:dotheyneedvalidatingfeachapplication).Finallyan8051microcontrollercefromNASAInstituteofAdvancedMicroelectronics(IAμE)CMOSUltraLowPowerRadiationTolerant(CULPRiT)designisevaluatedfSEEmitigativetechniquesagainstt
4、wocommercial8051devices.IndexIndexTermsTermsSingleEventEffectsHardenedByDesignmicrocontrollerradiationeffects.I.I.INTRODUCTIONINTRODUCTIONNASAconstantlystrivestoprovidethebestcaptureofsciencewhileoperatinginaspaceradiati
5、onenvironmentusingaminimumofresources[12].WitharelativelylimitedionofradiationhardenedmicroelectronicdevicesthatareoftentwomegenerationsofperfmancebehindcommercialstateofthearttechnologiesNASA’sperfmanceofthistaskisquite
6、challenging.Onemethodofalleviatingthisisbytheuseofcommercialfoundryalternativeswithnominimallyinvasivedesigntechniquesfhardening.Thisisoftencalledhardenedbydesign(HBD).BuildingcustomtypeHBDdevicesusingdesignlibrariesauto
7、mateddesigntoolsmayprovideNASAthesolutionitneedstomeetstringentscienceperfmancespecificationsinatimelycosteffectivereliablemanner.Howeveronequestionstillexists:traditionalradiationhardeneddeviceshavelotwaferradiationqual
8、ificationtestsperfmedwhattypesoftestsarerequiredfHBDvalidationII.II.TESTINGTESTINGHBDHBDDEVICESDEVICESCONSIDERATIONSCONSIDERATIONSTestmethodologiesintheUnitedStatesexisttoqualifyindividualdevicesthroughstardsganizationss
9、uchasASTMJEDECMILSTD883.TypicallyTID(Co60)SEE(heavyionproton)arerequiredfdevicevalidation.SowhatisuniquetoHBDdevicesAsopposedtoa“regular”commercialofftheshelf(COTS)deviceapplicationspecificintegratedcircuit(ASIC)wherenoh
10、ardeninghasbeentousetempallatchesthatrequirespecifictimingtoensurethatsingleeventeffectsareminimized.TheIAμEtechnologyusesultralowpowerlayoutarchitectureHBDdesignrulestoachievetheirresults.Thesearefundamentallydifferentt
11、hantheapproachbyAeroflexUnitedTechnologiesMicroelectronicsCenter(UTMC)thecommercialvendofaradiation–hardened8051thatbuilttheir8051microcontrollerusingradiationhardenedprocesses.Thisbroadrangeoftechnologywithinonedevicest
12、ructuremakesthe8051anidealvehiclefperfmingthistechnologyevaluation.TheobjectiveofthiswkisthetechnologyevaluationoftheCULPRiTprocess[3]fromIAμE.Theprocesshasbeenbaselinedagainsttwootherprocessesthestard8051commercialdevic
13、efromIntelaversionusingstateoftheartprocessingfromDallasSemiconduct.Byperfmingthissidebysidecomparisonthecostbenefitperfmancereliabilitytradestudycanbedone.Intheperfmanceofthetechnologyevaluationthistaskdevelopedhardware
14、softwareftestingmicrocontrollers.Athoughprocesswasdonetooptimizethetestprocesstoobtainascompleteanevaluationaspossible.Thisincludedtakingadvantageoftheavailablehardwarewritingsoftwarethatexercisedthemicrocontrollersuchth
15、atallsubstructuresoftheprocesswereevaluated.Thisprocessisalsoleadingtoamecompleteunderstingofhowtotestcomplexstructuressuchasmicrocontrollershowtomeefficientlytestthesestructuresinthefuture.IV.IV.TESTTESTDEVICESDEVICESTh
16、reedeviceswereusedinthistestevaluation.ThefirstistheNASACULPRiTdevicewhichistheprimarydevicetobeevaluated.Theothertwodevicesaretwoversionsofacommercial8051manufacturedbyIntelDallasSemiconductrespectively.TheInteldevicesa
17、retheROMlessCMOSversionoftheclassic8052MCS51microcontroller.Theyareratedfoperationat5Voveratemperaturerangeof0to70Cataclockspeedsof3.5MHzto24MHz.TheyaremanufacturedinIntel’sP629.0CHMOSIIIEprocess.TheDallasSemiconductdevi
18、cesaresimilarinthattheyareROMless8052microcontrollersbuttheyareenhancedinvariousways.Theyareratedfoperationfrom4.25to5.5Voltsover0to70Catclockspeedsupto25MHz.Theyhaveasecondfullserialptbuiltinsevenadditionalinterruptsawa
19、tchdogtimerapowerfailresetdualdatapointersvariablespeedperipheralaccess.Inadditiontheceisredesignedsothatthemachinecycleisshtenedfmostinstructionsresultinginaneffectiveprocessingabilitythatisroughly2.5timesgreater(faster
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