外文翻譯--定時器運(yùn)行

1、<p>　　畢業(yè)設(shè)計(論文)外文資料翻譯</p><p>　　學(xué)院(系)： 電子電氣工程學(xué)院 </p><p>　　專 業(yè)： 電子信息工程 </p><p>　　姓 名： </p><p>　　學(xué)

2、 號： </p><p>　　外文出處： The 8051 Microcontroller </p><p>　　附 件： 1.外文資料翻譯譯文；2.外文原文。 </p><p>　　附件1：外文資料翻譯譯文</p><p><b>　　第四章

3、 定時器運(yùn)行</b></p><p><b>　　4.1定時器介紹</b></p><p>　　在本章中，我們研究了8051的片上定時器。我們開始簡化視圖，因為它們通常用于微處理器或微控制器的計時器。</p><p>　　一個系列的定時器被劃分為兩個觸發(fā)器，觸發(fā)器的接收輸入信號作為時鐘源。時鐘頻率除以2的時鐘被應(yīng)用于第一個觸發(fā)器。第

4、一個觸發(fā)器的輸出時鐘為第二個觸發(fā)器除以2等。由于每個連續(xù)的階段都除以2，N個分期定時器的輸入時鐘頻率也除以2。最后一個階段的輸出時鐘觸發(fā)器，定時器溢出或者標(biāo)記都是由軟件測試或產(chǎn)生中斷。從定時器啟動后，定時觸發(fā)器的二進(jìn)制值可以被看作是一個“數(shù)量”的時鐘脈沖（或“事件”）。一個16位定時器，例如，將數(shù)從0000H到FFFFH。溢出標(biāo)志設(shè)置的計數(shù)值為FFFFH-0000H溢出。</p><p>　　一個簡單計時器的操作

5、是在3位定時器上的，每個階段是作為一個類型的三維負(fù)邊沿觸發(fā)觸發(fā)器2分頻模式（即經(jīng)營所示的輸出連接到D輸入）。觸發(fā)器的標(biāo)志僅僅是一個類型D鎖存器，被置于計時器的最后階段。它在時序圖是顯而易見,第一階段是1 / 2的時鐘頻率，第二階段是時鐘頻率的1 / 4。十進(jìn)制計數(shù)顯示，并且很容易通過檢查核實三個觸發(fā)器是否過時。例如，數(shù)“4”發(fā)生時，= 1。 =0，= 0（=）。</p><p>　　定時器是以幾乎所有的

6、控制為導(dǎo)向的應(yīng)用，8051定時器也不例外。兩個16位的定時器有四種操作模式。第三個16位定時器的三種操作模式是增加8052。定時器用于（a）時間間隔定時，（b）事件計數(shù)，（c）內(nèi)置串行端口的波特率速率生成。每一個定時器都是一個16位的定時器，因此= 65536除以16就是最后階段的輸入時鐘頻率。在間隔定時應(yīng)用時，編程定時器溢出；在定期的時間間隔是就要設(shè)置定時器溢出標(biāo)志。使用該標(biāo)志是同步方案的執(zhí)行，如檢查輸入狀態(tài)或的數(shù)據(jù)發(fā)送到輸出的行動。

7、其他的應(yīng)用程序也可以使用計時器來衡量這兩個條件之間所經(jīng)過時間的定期時鐘（例如脈沖寬度測量）。</p><p>　　事件計數(shù)器是用來確定事件的發(fā)生次數(shù)，而來衡量事件之間所經(jīng)過的時間。“事件”是任何外部刺激提供了1到0轉(zhuǎn)換到8051集成電路的引腳。該定時器還可以提供8051的內(nèi)部串行端口的波特率時鐘。8051定時器使用6個特殊功能寄存器進(jìn)行訪問。另外5個SFR提供訪問在8052第三定時器上。</p>&

8、lt;p>　　4.2定時器模式寄存器（TMOD）</p><p>　　TMOD寄存器包含兩組4位設(shè)置定時器0和1的操作模式。</p><p>　　TMOD是不可位尋址，也不需要使用譯碼芯片。一般來說，它是在一個程序初始化定時器模式開始通過軟件來加載。此后，定時器可以停止，啟動，并通過訪問其他定時器的SFR等。 </p><p>　　4.3定時器控制寄存器（TC

9、ON） </p><p>　　TCON寄存器包含了定時器0和1的狀態(tài)和控制位。TCON中的高4位（TCON.4 和TCON.7）用于打開和關(guān)閉的定時器（TR0，TR1）或信號定時器溢出（TF0，TF1）。這些高4位被廣泛使用在本章的例子。 </p><p>　　較低的4位TCON中的（TCON.0- TCON.3）與定時器無關(guān)。它們被用來檢測并啟動外部中斷。這些較低的4位討論被推遲到第6章

10、，討論中斷。</p><p>　　4.4定時器模式和溢出標(biāo)志</p><p>　　每個定時器將在下面討論。由于8051有兩個定時器，所以符號“X”是用來表示定時器0或定時器1，因此，“THX”是指定時器TH1或定時器TH0。安排顯示定時器寄存器TLx的THx和定時器溢出標(biāo)志TFX每種模式。</p><p>　　4.4.1 13位定時器模式（模式0）</p&g

11、t;<p>　　模式0是一個13位定時器模式，提供和8051的前身8048相同的兼容性。這在新的設(shè)計中通常不使用這種模式。定時器的高字節(jié)（THx）級聯(lián)五個最低有效位定時器的（TLx）來形成一個13位定時器。低字節(jié)TLx的上層3位沒有被使用。</p><p>　　4.4.2 16位定時器模式（模式1） </p><p>　　模式1是一個16位定時器模式，它和模式0相同。除了定

12、時器是作為一個完整的16位定時器操作外， 時鐘是被應(yīng)用于高位和低位相結(jié)合的定時器寄存器（TLx/ THx）。由于能接收時鐘脈沖，因此定時器計數(shù)：0000H，0001H，0002H等。發(fā)生溢出的計數(shù)值為FFFFH-0000H過渡，并設(shè)置定時器溢出標(biāo)志，定時器繼續(xù)計數(shù)。溢出標(biāo)志是TCON中的TFx標(biāo)志位通過軟件讀取或編寫出來的。</p><p>　　最重要的位（MSB）是在定時器寄存器的高字節(jié)THx的第7位和最低有效

13、位（LSB）TLx的第0位。LSB的切換是輸入時鐘頻率除以2，而MSB切換是輸入時鐘頻率除以65536（即）。定時器寄存器（TLx/ THx），它可被讀取或隨時由軟件寫入。</p><p>　　4.4.3 8位自動重裝模式（模式2）</p><p>　　模式2是8位自動重裝載模式。作為一個8位定時器，該定時器的低字節(jié)（TLx）運(yùn)行，而定時器的高字節(jié)（THX）擁有重載值。當(dāng)計數(shù)從FFH到0

14、0H溢出時，不僅是計時器標(biāo)志設(shè)置，THx的值被裝入至TLx時繼續(xù)計數(shù)，從這個值FFH -00H過渡到下一個值等。這種模式是便捷的，因為一旦TMOD和THX被初始化，定時器溢出就發(fā)生在具體的周期間隔。</p><p>　　4.4.4 斯普利特定時器模式（模式3） </p><p>　　模式3是分割定時器模式它不同于每個定時器。在模式3中，定時器0分成兩個8位定時器。TL0和TH0分別

15、設(shè)置TF0和TF1位獨(dú)立的定時器溢出行為。 </p><p>　　一旦定時器1在模式3中停止后可以啟動切換到其他模式之一。 唯一的限制是通常的定時器1溢出標(biāo)志位。TF1不是受到定時器1溢出的影響，因為它是連接到TH0中。 </p><p>　　模式3本質(zhì)上提供了一個額外的8位定時器。 8051還有第三個計時器。當(dāng)定時器0處于模式3時，定時器1可開啟和關(guān)閉并切換到自己的模式3。它仍然可以用作

16、串行端口的波特率發(fā)生器，它也可以在任何不要求中斷的方式使用（因為它不再連接到TF1）。</p><p>　　4.5 時鐘源 </p><p>　　如圖4-2，不顯示的定時器的時鐘。有兩種可能的時鐘源，定時器初始化時通過寫在TMOD位計數(shù)器/定時器（）被選定。事件計數(shù)器的其他時鐘源之一被用于時間間隔的時序。 </p><p>　　4.5.1 時間間隔的時序&l

17、t;/p><p>　　如果= 0，連續(xù)定時器操作是選擇從片上振蕩器提供時鐘和計時器。分頻的12階段被添加到減少時鐘頻率值對于大多數(shù)應(yīng)用程序都是合理的。 </p><p>　　當(dāng)選擇連續(xù)定時器操作時，定時器用于時序時間間隔。定時器寄存器（TLx的/ THx）的頻率增量是片上振蕩器的1/12速率，因此，一個12 MHz晶體將產(chǎn)生1 MHz的時鐘速率。定時器溢出后，會出現(xiàn)一個固定數(shù)目的時鐘，根據(jù)初始

18、值加載到定時器寄存器，至TLx/ THX。 </p><p>　　4.5.2 事件計數(shù) </p><p>　　如果= 1，定時器來自于外部信號源。在大多數(shù)應(yīng)用中，這種外部源供應(yīng)的定時器與后一個“事件”的發(fā)生脈沖定時器都是事件計數(shù)器。定時器寄存器TLx的/ THx事件的數(shù)量是通過軟件讀取來確定。 16位值在這些寄存器中的每個事件遞增。</p><p>　　外部時鐘源

19、是通過端口3引腳的復(fù)用功能的方式實現(xiàn)的。在這種情況下端口3位4（P3.4）作為定時器0的外部時鐘輸入端“T0”。P3.5或“TL”，是TIMET1的時鐘輸入。</p><p>　　在計數(shù)器的應(yīng)用中，1到0的轉(zhuǎn)換是通過外部輸入TX定時器寄存器來遞增。外部輸入在每個機(jī)器周期的S5P2期間被采樣，因此，當(dāng)輸入顯示在一個周期為高，則在下一個周期為低，并且計數(shù)遞增。定時器周期的S3P1期間出現(xiàn)的新值是在寄存器以后的過渡期中

20、被檢測到的。 由于識別1到0的跳變需要兩個機(jī)器周期（2 us），最大的外部頻率為500kHz（假設(shè)12 MHz運(yùn)行）。</p><p>　　4.6 啟動，停止,控制定時器</p><p>　　圖2說明了定時器寄存器的TLx，THx和定時器溢出標(biāo)志位TFx的各種配置。定時器計時兩種性能，如圖4-3所示。我們現(xiàn)在演示如何啟動停止和控制定時器。 </p><p>　　最

21、簡單的方法是啟動和停止定時器運(yùn)行控制位，TRx位在TCON中。當(dāng)TRx明確后，系統(tǒng)復(fù)位，因此定時器默認(rèn)情況下禁用（停止）。TRx置位通過軟件來啟動定時器。</p><p>　　由于TRx的位尋址在寄存器TCON，它就很容易在一個程序中啟動和停止定時器。例如，啟動定時器0 </p><p>　　SETB TR0</p><p><b>　　停止定時器

22、0</b></p><p>　　CLR TR0</p><p>　　匯編器將從“TR0”到正確的位地址執(zhí)行必要符號轉(zhuǎn)換。SETB TR0和SETB 8通道是完全一樣的。</p><p>　　定時器控制的另一種方法是在TMOD的GATE位和外部輸入的。當(dāng)設(shè)置GATE = 1時，允許定時器控制。如下對于脈沖寬度測量，這是有用的。假設(shè)是低，但經(jīng)過一段時

23、間的測量后為高。初始化定時器0模式2，當(dāng)16位定時器模式與TL0/TH0=0000H，GATE = 1時，則TR0= 1。當(dāng)為高電平時，定時器是“門控開”和速度主頻為1 MHz。當(dāng)變低電平時，定時器是“門控關(guān)閉”，而且微秒脈沖的持續(xù)時間是在TL0和TH0計數(shù)，（當(dāng)它返回低電平時，可以編程產(chǎn)生一個中斷）。</p><p>　　定時器1作為模式1是一個16位定時器,以及定時器寄存器TL1/TH1和溢出標(biāo)志位TF1。圖

24、中顯示的時鐘源是啟動，停止和控制定時器的幾種可能。</p><p>　　4.7 初始化和訪問定時器寄存器</p><p>　　通常定時器在程序設(shè)置正確的操作模式時開始初始化一次。此后，內(nèi)部機(jī)體的一個程序有定時器啟動，停止，測試和清零標(biāo)志位，定時器寄存器讀取或更新所需的應(yīng)用程序。</p><p>　　由于TMOD設(shè)置的運(yùn)作模式，所以它是第一個寄存器初始化的。例如，下

25、面的指令是初始化定時器1作為一個16位定時器時鐘（模式1）的片上振蕩器（間隔計時）：MOV TMOD#00010000B</p><p>　　此指令的作用是設(shè)置M1= 0和M0= 1為MODE1, 脫離= 0和GATE= 0的內(nèi)部時鐘則就清除定時器0的模式位。當(dāng)然，定時器不開始計時，直到其運(yùn)行控制位TR1設(shè)置。</p><p>　　如果初始計數(shù)是必要的，定時器寄存器TL1/TH1也必須

26、被初始化。記住定時器計數(shù)，并設(shè)置FFFFH-0000H過渡溢出標(biāo)志, 100 us的時間間隔可以定時初始化TL1/TH1到100計數(shù)要比0000H少。正確的值是- 100或FF9CH。下面的指令完成這項工作：</p><p>　　MOV TL1, #9CH</p><p>　　MOV TH1, #0FFH</p><p>　　然后啟動定時器運(yùn)行控制位設(shè)置如下

27、：</p><p><b>　　SETB TR 1</b></p><p>　　4.7.1 讀定時器的“飛行”模式</p><p>　　在某些應(yīng)用中，它是必要的讀取定時器值寄存器“飛行”模式。有一個潛在的問題很簡單來防止軟件對抗。由于兩個定時器寄存器必須先讀取，所以“相位誤差”可能會出現(xiàn)在兩個讀操作之間的低字節(jié)到高字節(jié)溢出位?？梢员蛔x的A值從

28、來就不存在；解決的辦法是先讀高字節(jié)的第一位，其次讀低字節(jié)，然后再讀取高字節(jié)。如果高字節(jié)發(fā)生了變化，重復(fù)進(jìn)行讀取操作。下面的指令是讀取定時器的內(nèi)容從寄存器TL1/TH1到寄存器R6/R7來正確處理這個問題。</p><p>　　AGAIN: MOV A, THl</p><p>　　MOV R6, TL1</p><p>　　CJNE A , THl,

29、 AGAIN</p><p>　　MOV R7, A</p><p><b>　　附件2：外文原文</b></p><p><b>　　4 </b></p><p>　　TIMER OPERATION</p><p>　　4.1 INTRODUCTIONIn this

30、 chapter we examine the 8051's on-chip timers. We begin with a simplified view of timers as they are commonly used with microprocessors or microcontrollers. A timer is a series of divide-by-two flip-flops that r

31、eceive an input signal as a clocking source. The clock is applied to the first flip-flop, which divides the clock frequency by 2. The output of the first flip-flop clocks the second flip-flop, which also divides by 2 and

32、 so on. Since each successive stage divi</p><p>　　Timers are used in virtually all control-oriented applications, and the 8051 timers are no exception. There are two 16-bit timers each with four modes of ope

33、ration. A third 16-bit timer with three modes of operation is added on the 8052. The timers are used for (a) interval timing, (b) event counting, or (c) baud rate generation for the built-in serial port. Each is a 16-bit

34、 timer, therefore the 16th or last stage divides the input clock frequency by = 65536. </p><p>　　In interval timing applications, a timer is programmed to overflow at a regular interval and set the timer ov

35、erflow flag. The flag is used to synchronize the program to perform an action such as checking the state of inputs or sending data to outputs. FIGURE 4-1 </p><p>　　A 3-bit timer. (a) Schematic (b) Timing d

36、iagram.</p><p>　　Other applications can use the regular clocking of the timer to measure the elapsed time between two conditions (e.g. pulse width measurements).</p><p>　　Event counting is used

37、to determine the number of occurrences of an event, rather than to measure the elapsed time between events. An "event" is any external stimulus that provides a 1-to-0 transition to a pin on the 8051 IC. The tim

38、ers can also provide the baud rate clock for the 8051 's internal serial port.</p><p>　　The 8051 timers are accessed using six special function registers. (See Table 4-1.). An additional 5 SFRs provide a

39、ccess to the third timer in the 8052.</p><p>　　4.2 TIMER MODE REGISTER (TMOD)</p><p>　　The TMOD register contains two groups of four bits that set the operating mode for Timer 0 and Timer 1. (Se

40、e Table 4-2 and Table 4-3.). </p><p>　　TMOD is not bit-addressable, nor does it need to be. Generally, it is loaded once by software at the beginning of a program to initialize the timer mode. Thereafter, th

41、e timer can be stopped, started, and so on by accessing the other timer SFRs.</p><p>　　4.3 TIMER CONTROL REGISTER (TCON)</p><p>　　The TCON register contains status and control bits for Timer 0 a

42、nd Timer 1 (see Table 4-4). The upper four bits in TCON (TCON.4-TCON.7) are used to turn the timers on and off (TR0, TR1),or to signal a timer overflow (TF0, TF1).These bits are used extensively in the examples in this c

43、hapter.</p><p>　　The lower four bits in TCON (TCON.0-TCON.3) have nothing to do with the timers. They are used to detect and initiate external interrupts. Discussion of these bits is deferred until chapter 6

44、, when interrupts are discussed.</p><p>　　4.4 TIMER MODES AND THE OVERFLOW FLAG</p><p>　　Each timer is discussed below .Since there are two timers on the 8051,the notation "x" is used

45、to imply either Timer 0 or Timer 1;thus, "THx" means either TH1 or TH0 depending on the timer.</p><p>　　The arrangement of timer registers TLx and THx and the timer overflow 1 flags TFx is shown in

46、 Figure 4-2 for each mode.</p><p>　　4.4.1 13-Bit Timer Mode (Mode 0)</p><p>　　Mode 0 is a 13 bit timer mode that provides compatibility with the 8051’s predecessor the 8048. It is not generally

47、used in new designs. (See Figure 4-2a.). The timer high- byte (THx) is cascaded with the five least-significant bits of the timer low-byte (TLx) to form a 13-bit timer. The upper three bits of TLx are not used.</p>

48、<p>　　4.4.2 16-Bit Timer Mode (Mode 1)</p><p>　　Mode 1 is a 16-bit timer mode and is the same as mode 0. except the timer is operating as a full 16-bit timer. The clock is applied to the combined high

49、 and low timer registers (TLx/THx). As clock pulses are received, the timer counts up: 0000H, 0001H, 0002H，etc. An overflow occurs on the FFFFH-to-0000H transition of the count and sets the timer overflow flag.

50、 </p><p>　　The timer continues to count. The overflow- flag is the TFx bit in TCON that is read or written by software. (See Figure 4-2b)</p><p>　　The most-significant bit (MSB)o

51、f the value in the timer registers is THx bit 7, and the least-significant bit (LSB) is TLx bit 0. The (LSB)toggles at the input clock frequency divided by 2, while the MSB toggles at the input clock frequency divided by

52、 65536 (i.e ,).The timer registers (TLx/THx)may he read or written at any time by software.</p><p>　　4.4.3 8-Bit Auto-Reload Mode (Mode 2)</p><p>　　Mode 2 is 8-bit autoreload mode. The timer low

53、-byte (TLx) operates as an 8 bit timer while the timer high-byte (THx) holds a reload value. When the count overflows from FFH to 00H, not only is the timer flag set, but the value in THx is loaded into TLx; counting con

54、tinues from this value up to the next FFH-to-00H transition, and so on. This mode is convenient, since timer overflows occur at specific, periodic intervals once TMOD and THx are initialized. (See Figure 4-2c.)</p>

55、<p>　　4.4.4 Split Timer Mode (Mode 3)</p><p>　　Mode 3 is the split timer mode and is different for each timer. Timer 0 in mode 3 is split into two 8-bit timers. TL0 and TH0 act as separate timers with

56、 overflows setting the TF0 and TF1 bits respectively.</p><p>　　Timer 1 is stopped in mode 3. but can be started by switching it into one of the other modes. The only limitation is that the usual Timer 1 over

57、flow flag. TF1, is not affected by Timer 1 overflows, since it is connected to TH0.</p><p>　　Mode 3 essentially provides an extra 8-bit timer. The 8051 appears to have a third timer. When Timer 0 is in mode

58、3. Timer I can he turned on and off by switching it out of and into its own mode 3. It can still be used by the serial port as a baud rate generator, or it can be used in any way not requiring interrupts (since it is no

59、longer connected toTF1).</p><p>　　4.5 CLOCKING SOURCES</p><p>　　Figure 4-2 does not show how the timers are clocked. There are two possible clock sources, selected by writing to the counter / ti

60、mer () bit in TMOD when the timer is initialized. One clocking source is used for interval timing, the other for event counting.</p><p>　　4.5.1 Interval Timing</p><p>　　If = 0, continuous timer

61、 operation is selected and the timer is clocked from the on-chip oscillator. A divide-by-12 stage is added to reduce the clocking frequency to a value reasonable for most applications.</p><p>　　When continuo

62、us timer operation is selected, the timer is used for interval timing.The timer registers (TLx/THx) increment at a rate of 1/12th the frequency of the on-chip oscillator; thus, a 12 MHz crystal would yield a clock rate o

63、f 1 MHz. Timer overflows occur after a fixed number of clocks, depending on the initial value loaded into the timer registers, TLx/THx.</p><p>　　4.5.2 Event Counting</p><p>　　If =1, the timer

64、is clocked from an external source. In most applications, this external source supplies the timer with a pulse upon the occurrence of an "event"—the timer is event counting. The number of events is determined i

65、n software by reading the timer registers TLx/THx. since the 16-bit value in these registers increments for each event.</p><p>　　The external clock source comes by way of the alternate functions of the port

66、3 pins. Port 3 bit 4(P3.4) serves as the external clocking input for Timer 0 and is known as"T0" in this context. P3.5,or "Tl," is the clocking input for Timet 1. (See Figure 4-3.)</p><p>

67、;　　In counter applications. The timer registersare incremented in response to a 1-to-0 transition at the external input. Tx. The external input is sampled during S5P2 of every machine cycle; thus, when the input shows a

68、high in one cycle and a low in the next,the count is incremented. The new value appears in the timer registers during S3P1 of the cycle following the one in which the transition is detected. Since it takes two machine cy

69、cles (2 us) to recognize a 1-to-0 transition, the maximum exter</p><p>　　4.6 STARTING, STOPPING. AND CONTROLLING THE TIMERS</p><p>　　Figure 4 2 illustrates the various configurations for the tim

70、er registers, TLx and THx, and the timer overflow flags, TFx. The two possibilities for clocking the timers are shown in Figure 4-3. We now demonstrate how to start stop, and control the timers.</p><p>　　The

71、 simplest method for starting and stopping the timers it with the run control bit ,TRx, in TCON. TRx is clear after a system reset, thus, the timers are disabled (stopped) by default .TRx is set by software to start the

72、timers (See Figure 4-4 ).</p><p>　　Since TRx is in the bit-addressable register TCON, it is easy to start and stop thetimers within a program. For example ,Timer 0 is started by</p><p>　　SETB

73、 TR0</p><p>　　and stopped by</p><p>　　CLR TR0</p><p>　　The assembler will perform the necessary symbolic conversion from "TRO" to the correct bit address. SETB TR0 is

74、 exactly the same as SETB 8 CH.</p><p>　　Another method for controlling the timers is with the GATE bit in TMOD and the external input . Setting GATE= 1 allows the timer to be controlled by . This is useful

75、for pulse width measurements as follows. Assume is low but pulses high for a period of time to be measured. Initialize Timer 0 for mode 2,16-bit timer mode, with TL0/TH0 =0000H, GATE=1, and TRO=1. When goes high, the t

76、imer is "gated on" and is clocked at a rate of 1 MHz. When goes low, the timer is "gated off " and the duration o</p><p>　　To complete The picture, Figure 4-5 illustrates. Timer 1 operat

77、ing in mode 1 as a 16-bit timer . As well as the timer registers TL1/TH1 and the overflow flag TF1, the diagram shows the possibilities for the clocking source and for starting, stopping, and controlling the timer.</p

78、><p>　　4.7 INITIALIZING AND ACCESSING TIMER REGISTERS</p><p>　　The timers are usually initialized once at the beginning of a program to set the correct operating mode. Thereafter, within the body o

79、f a program, the timers are started, stopped, flag bits tested and cleared, timer registers read or updated, and so on. as required in the application.</p><p>　　TMOD is the first register initialized. Since

80、it sets the mode of operation . For example, the following instruction initializes Timer 1 as a 16-bit timer (mode 1) clocked by the on-chip oscillator (interval timing):</p><p>　　MOV TMOD#00010000B</p&

81、gt;<p>　　The effect of this instruction is to set M1= 0 and M0=1 for mode1, leave = 0 and GATE=0 for internal clocking, and clear the Timer 0 mode bits (See Table 4-2). Of course, the timer does not actually begin

82、 timing until its run control bit. TR1 is set.</p><p>　　If an initial count is necessary, the timer registers TL1/TH1 must also be initialized. Remembering that the timers count up and set the overflow flag

83、on an FFFFH-to-0000H transition ,a 100 us interval could be timed by initializing TL1/TH1 to 100 counts less than 0000H .The correct value is - 100 or FF9CH. The following instructions do the job:</p><p>　　M

84、OV TL1, #9CH</p><p>　　MOV TH1, #0FFH</p><p>　　The timer is then started by selling the run control bit as follows:</p><p><b>　　SETB TR 1</b></p><p>　　4.

85、7.1 Reading a Timer "On the Fly"</p><p>　　In some applications, it is necessary to read the value in the timer registers "on the fly." There is a potential problem that is simple to gua

86、rd against in software. Since two timer registers must be read, a "phase error'' may occur if the low-byte overflows into the high-byte between the two read operations. A value may be read that never existed

87、. The solution is to read the high-byte first, then the low-byte, and then read the high-byte again. If the high-byte has changed, repeat the read ope</p><p>　　AGAIN: MOV A, THl</p><p>　　MOV