外文翻譯---基于c51兼容微處理器單片機(jī)的pwm控制器設(shè)計(jì)

1、<p><b>　　外文原文</b></p><p>　　Design of PWM Controller in a MCS-51 Compatible MCU</p><p>　　Introduction</p><p>　　PWM technology is a kind of voltage regulation method

2、by controlling the switch frequency of DC power with fixed voltage to modify the two-end voltage of load.This technology can be used for a variety of applications including motor control, temperature control and pressure

3、 control and so on. In the motor control system shown as Fig. 1, through adjusting the duty cycle of power switch, the speed of motor can be controlled. As shown in Fig. 2, under the control of PWM signal, the average of

4、 volta</p><p>　　Fig.1: The Relationship Fig.2 Architecture of</p><p>　　between Voltage of Armature PWM Module</p><p>　　Therefore, the

5、 motor speed can be controlled with regularly adjusting the time of turn-on and turn-off. There are three methods could achieve the adjustment of duty cycle: (1) Adjust frequency with fixed pulse-width. (2) Adjust both f

6、requency and pulse-width. (3) Adjust pulse-width with fixed frequency. </p><p>　　Active steering control in the form of secondary yaw control (SYC) and actuated wheelset yaw (AWY)have been in prototype devel

7、opment. This paper presents a new active steering bogie design, actuated yaw force steering (AY-FS), that is able to steer under high traction loads in tight curves. The AY-FS bogie design is compared with the AWY design

8、. The steering performance AWY under high traction loads has not been previously reported. This paper examines five control methods, three for AWY and two</p><p>　　Active suspensions and more recently active

9、 steering has received increasing interest for high-speed train sets [1,2]. Active steering control in the form secondary yaw control (SYC) [3] and actuated wheelset yaw (AWY) [4] exist in developments up to prototype st

10、age. SYC bogies control the bogie yaw angle Figure 1 and can improve the wear or creep force saturation at the wheel–rail contact which is the concern for hauling locomotives. However, improvement is limited to the even

11、distribution of w</p><p>　　Generally, there are four methods to generate the PWM signals as the following: (1) Generated by the device composed of separate logic components. This method is the original metho

12、d which now has been discarded. (2) Generated by software. This method need CPU to continuously operate instructions to control I/O pins for generating PWM output signals, so that CPU can not do anything other. Therefore

13、, the method also has been discarded gradually. (3) Generated by ASIC. The ASIC makes a decrease of </p><p>　　In this paper, we propose a PWM module embedded in a 8051 microcontroller. The PWM module can sup

14、port PWM pulse signals by initializing the control register and duty-cycle register with three methods just mentioned above to adjust the duty cycle and several operation modes to add flexibility for user. </p>&l

15、t;p>　　The following section explains the architecture of the PWM module and the architectures of basic functional blocks. Section3 describes two operation modes. Experimental and simulation results verifying proper sy

16、stem operation are also shown in that section. Depending on mode of operation, the PWM module creates one or more pulse-width modulated signals, whose duty ratios can be independently adjusted.</p><p>　　Impl

17、ementation of PWM module in MCU</p><p>　　Overview of the PWM module</p><p>　　A block diagram of PWM module is shown in Fig.3. It is clearly from the diagram that the whole module is composed of

18、two sections: PWM signal generator and dead-time generator with channel select logic. The PWM function can be started by the user through implementing some instructions for initializing the PWM module. In particular, the

19、 following power and motion control applications are supported:</p><p>　　? DC Motor</p><p>　　? Uninterruptablel Power Supply (UPS)</p><p>　　·The PWM module also has the followi

20、ng features:</p><p>　　? Two PWM signal outputs with complementary or independent operation</p><p>　　? Hardware dead-time generators for complementary mode</p><p>　　? Duty cycle upda

21、tes are configurable to be immediated or synchronized to the PWM</p><p>　　Fig.3 Architecture of PWM Module</p><p>　　Details of the architecture</p><p>　　PMW generator</p>&

22、lt;p>　　The architecture of the 2-output PWM generator shown in Fig.4 is based on a 16-bit resolution counter which creates a pulse-width modulated signal. The system is synthesized by a system clock signal whose frequ

23、ency can be divided by 4 times or 12 times through setting the value of T3M for PWM0 or T4M for PWM1 in the special register PWMCON as shown in Fig.4. To PWM0 generator, the clock to 16-bit counter will be pre-divided by

24、 4 times by default when T3M is set to zero. And the clock will be div</p><p>　　Fig .4 Bit Mapping of PWMCON</p><p>　　Table 1: The Bit Definition in PWMCON</p><p>　　Channel-select

25、logic</p><p>　　The follow Fig. 5 shows the channel-select logic which is useful in Complementary Mode. From this diagram, it is clear to know that signal CP and CPWM control the source of PWMH and PWML. And

26、the details about the two control signals will be discussed in the section 3, and the architecture of dead-time generator will also be discussed in section 5 for the continuity of Complementary Mode.</p><p>

27、　　Fig. 5 Diagram of Channel-select Logic</p><p>　　Operation Mode and Simulation Results</p><p>　　The design has two operation modes: Independent Mode and Complimentary Mode. By setting the cor

28、responding bit CPWM in register PWMCON shown in Fig.6 user can select one of the two operation modes. When CPWM is set to zero, PWM module will work in Independent Mode, whereas, PWM module will work in Complimentary Mod

29、e. In the following of this section, the two operation mode will be explained respectively in detail and the simulation results of the PWM module from the Synoposys VCS EDA platform whi</p><p>　　Independent

30、PWM Output Mode</p><p>　　An Independent PWM Output mode is useful for driving loads such as the one shown in Figure 6. A particular PWM output is in the Independent Output mode when the corresponding CP bit

31、in the PWMCON register is set to zero.In this case, two-channel PWM outputs are independent of each other. The signal on pin PWM0/PWMH is from PWM0 generator, and the signal on pin PWM1/PWML is from PWM0 generator. The s

32、eparate case is achieved by the channel-select logic shown in Fig. 6. The PWM I/O pins are set to </p><p>　　Fig6 the Waveform of PWM Outputs in Independent Mode</p><p>　　Complementary PWM Outpu

33、t Mode</p><p>　　The Complementary Output mode is used to drive inverter loads similar to the one shown in Figure 7. This inverter topology is typical for DC applications. In Complementary Output Mode, the pa

34、ir of PWM outputs cannot be active simultaneously. The PWM channel and output pin pair are internally configured through channel-select logic as shown in Figure7. A dead-time may be optionally inserted during device swit

35、ching where both outputs are inactive for a short period.</p><p>　　Fig 7 : Typical Load for Complementary PWM Outputs</p><p>　　The Complementary mode is selected for PWM I/O pin pair by setting

36、the appropriate CPWM bit in PWMCON. In this case, PSEL is in effect. PWMH and PWML will come from PWM0 generator when PSEL is set to zero, when the signals from PWM1 generator is useless, whereas PWMH and PWML will come

37、from PWM1 generator when PSEL is set to 1, when the signals from PWM0 generator is useless. In the process of producing the PWM outputs in Complementary Mode, the dead-time will be inserted to be discussed in the </p&

38、gt;<p>　　Dead-time Control </p><p>　　Dead-time generation is automatically enabled when PWM I/O pin pair is operating in the Complementary Output mode. Because the power output devices cannot switch i

39、nstantaneously, some amount of time must be provided between the turn-off event of one PWM output in a complementary pair and the turn-on event of the other transistor. The 2-output PWM module has one programmable dead-t

40、ime with 8-bit register.The complementary output pair for the PWM module has an 8-bit down counter that is used to pr</p><p>　　Fig 8a Dead-time Unit Block Diagram</p><p>　　Fig. 8b the Waveform

41、s of PWM Outputs in Complementary Mode</p><p>　　Conclusions</p><p>　　In this paper, we have designed PWM module based on an 8-bit MCU compatible with 8051 family. The design can generate 2-chann

42、el programmable periodic PWM signals with two operation mode, Independent Mode and Complementary Mode in which dead-time will be inserted. The simulation results on the EDA platform have proven its correctness and useful

43、ness.</p><p><b>　　中文翻譯</b></p><p>　　基于C51兼容微處理器單片機(jī)的PWM控制器設(shè)計(jì)</p><p><b>　　導(dǎo) 言</b></p><p>　　PWM技術(shù)，是一種電壓調(diào)節(jié)方法，通過(guò)控制具有固定電壓的直流電源的開關(guān)頻率來(lái)調(diào)整兩端負(fù)荷電壓。這種技術(shù)能用于各

44、種應(yīng)用包括電機(jī)、溫度、和壓力的控制，等等。在電機(jī)系統(tǒng)中的應(yīng)用，如圖1所示，通過(guò)調(diào)整電源開關(guān)的占空比，來(lái)控制電機(jī)的速度，如圖2所示，平均電壓通過(guò)改變占空比來(lái)控制電機(jī)的速度（在圖中D=t1/T）,這樣當(dāng)電機(jī)的電源打開時(shí)，它的速度加快，相反，當(dāng)電源關(guān)閉時(shí)，速度下降。</p><p>　　圖1 PWM控制框圖 圖2 電壓的電樞和占空比之間的關(guān)系</p><p>

45、;　　所以，通過(guò)定期地調(diào)整時(shí)間的開通和關(guān)斷來(lái)控制電機(jī)的轉(zhuǎn)速：這兒有三種方法可以完成占空比的調(diào)整（1）通過(guò)脈寬來(lái)調(diào)整頻率；（2）通過(guò)同時(shí)調(diào)整頻率和脈寬；（3）通過(guò)頻率來(lái)調(diào)整脈寬。</p><p>　　在二次偏航控制和驅(qū)動(dòng)車輪偏航的形式下的主動(dòng)轉(zhuǎn)向控制已經(jīng)處在樣板階段。本文提出一種新的主動(dòng)轉(zhuǎn)向轉(zhuǎn)向架設(shè)計(jì)、啟動(dòng)的偏航力量轉(zhuǎn)向(AY-FS),能夠避免在高牽引負(fù)荷在緊張的曲線。AY-FS的轉(zhuǎn)向架的設(shè)計(jì)是和AWY的設(shè)計(jì)配套的

46、。在高牽引負(fù)載的情況下的轉(zhuǎn)向性能還沒(méi)有明顯的報(bào)道。本文介紹了五個(gè)控制方法，三個(gè)是給AWY，兩個(gè)是給AY-FS。五個(gè)方法是為了評(píng)估在可選擇可控制的情況下?tīng)恳龔澢目刂菩阅芎头€(wěn)定性。與被動(dòng)轉(zhuǎn)向架的設(shè)計(jì)有什么區(qū)別。結(jié)果表明，AY-FS轉(zhuǎn)向架比AWY的彎曲性能好的多。其控制必須使用兩偏航角和方向盤的角度轉(zhuǎn)向架才打到的最佳牽引性能，而AWY是不可能達(dá)到的。在新的轉(zhuǎn)向架設(shè)計(jì)下，AY_FS的牽引彎曲和穩(wěn)定性比AWY好。</p><

47、p>　　主動(dòng)懸架和最近的主動(dòng)轉(zhuǎn)向系統(tǒng)在高速列車方面得到了越來(lái)越多的好處。主動(dòng)轉(zhuǎn)向控制是二偏航控制形式和驅(qū)動(dòng)輪對(duì)偏航存在發(fā)展起來(lái)的原型階段。圖1為SYC的轉(zhuǎn)向架的控制和轉(zhuǎn)向架擺角。可以提高磨損和滑動(dòng)力，這樣可以在車輪之間加強(qiáng)飽和。從而關(guān)注牽引機(jī)車的軌接觸。然而，在改進(jìn)均勻的輪對(duì)攻角和接觸力是有限的。SYC轉(zhuǎn)向架更成功的提高穩(wěn)定性，相比蠕變能量更能減少轉(zhuǎn)移軌道。軌道移動(dòng)的力量成為限制只有高速傾斜列車。最近的專利是AWY的三軸轉(zhuǎn)向架包括

48、控制懸架變形和陀螺輸入。</p><p>　　一般情況下，有四中方法可以產(chǎn)生PWM信號(hào)，正如以下：（1）由獨(dú)立邏輯元件組成的裝置產(chǎn)生，這種是原始的方法，現(xiàn)在已被淘汰；（2）通過(guò)軟件產(chǎn)生，這種方法需要CPU持續(xù)操作代碼來(lái)控制I/O口，以致于CPU不能做其他任何事。所以，這種方法也漸漸被淘汰；（3）通過(guò)ASIC產(chǎn)生，ASIC減少了CPU的負(fù)擔(dān)，并獲得了穩(wěn)定的工作，一般有幾個(gè)功能，如電流保護(hù)、死區(qū)時(shí)間調(diào)整等等；然而這種

49、方法現(xiàn)在已被廣泛用于許多場(chǎng)合；（4）通過(guò)單片機(jī)的PWM功能模塊產(chǎn)生，只有當(dāng)需要改變占空比的時(shí)候CPU失控，這樣就不能產(chǎn)生PWM信號(hào)，否則通過(guò)在單片機(jī)里嵌入PWM功能模塊，并使這功能初始化，單片機(jī)的PWM口也能自動(dòng)產(chǎn)生PWM信號(hào)。這種方法將在文章中講述。</p><p>　　在本文中，我們建議在8051單片機(jī)里嵌入一個(gè)PWM模塊。該P(yáng)WM模塊，通過(guò)初始化控制寄存器和寄存器的占空比，可以支持PWM脈沖信號(hào)，用剛才提到

50、的上述三種方法調(diào)整占空比和幾個(gè)操作模式，以增加用戶彈性。</p><p>　　以下這部分解釋PWM模塊和基本功能模塊的結(jié)構(gòu)。第三部分描述兩種操作模式。這部分還講述了實(shí)驗(yàn)和仿真的結(jié)果驗(yàn)證了合適的系統(tǒng)操作。通過(guò)操作模式，PWM模塊產(chǎn)生一個(gè)或更多的脈寬模塊信號(hào)，它們的比率可以自主調(diào)整。</p><p>　　在單片機(jī)上執(zhí)行PWM模塊</p><p><b>　　P

51、WM模塊的概述</b></p><p>　　PWM模塊如圖3所示，從圖中，可以很清楚得看到整個(gè)模塊有兩部分組成：PWM信號(hào)產(chǎn)生器和帶有頻道選擇邏輯的死區(qū)時(shí)間產(chǎn)生器。用戶可以通過(guò)執(zhí)行一些代碼使PWM模塊初始化，從而啟動(dòng)其功能。在特殊情況下，支持以下電源和運(yùn)動(dòng)控制應(yīng)用：</p><p><b>　　1.直流電機(jī)</b></p><p>

52、<b>　　2.持續(xù)電源供應(yīng)</b></p><p>　　PWM模塊也有以下特征：</p><p>　　1.兩個(gè)PWM輸出信號(hào)以互補(bǔ)或獨(dú)立的方式運(yùn)行</p><p>　　2.帶有互補(bǔ)模式的硬件死區(qū)電動(dòng)機(jī)</p><p>　　3.占空比更新設(shè)置應(yīng)立刻或與PWM同步</p><p>　　圖3 P

53、WM模塊的結(jié)構(gòu)</p><p><b>　　結(jié)構(gòu)的詳細(xì)組成</b></p><p><b>　　PWM電動(dòng)機(jī)</b></p><p>　　二輸出PWM電動(dòng)機(jī)的結(jié)構(gòu)如圖2.1所示，該結(jié)構(gòu)是基于能產(chǎn)生脈寬調(diào)制信號(hào)上的16位計(jì)數(shù)器。該系統(tǒng)由四分頻或十二分頻的系統(tǒng)時(shí)鐘信號(hào)合成，時(shí)鐘信號(hào)的頻率可通過(guò)對(duì)在特殊寄存器PWMCON中的PW

54、M0電機(jī)的T3M或PWM1電機(jī)的T4M的值進(jìn)行設(shè)置而調(diào)整，如圖4所示：對(duì)于PWM0電機(jī)，當(dāng)T3M設(shè)置為零時(shí)，16位計(jì)數(shù)器時(shí)鐘將被默認(rèn)預(yù)分為四分頻，當(dāng)T3M設(shè)置為1時(shí)，始終將被十二分頻；PWM同樣有這種功能。在PWMCON中的其它位的定義，詳見(jiàn)表1</p><p>　　圖4 PWMCON的位的位置</p><p>　　表1 PWMCON的位的定義</p><p

55、><b>　　通道選擇邏輯 </b></p><p>　　通道選擇邏輯在互補(bǔ)模式中很有用，如圖5所示。從表中可以清楚得看出，信號(hào)的CP和CPWM控制PWM1和PWML的來(lái)源，這兩個(gè)控制信號(hào)的詳細(xì)情況將在第三部分講述，死區(qū)時(shí)間電機(jī)的結(jié)構(gòu)也將在一下部分的連續(xù)性互補(bǔ)模式中講述。</p><p>　　圖5 通道選擇邏輯表</p><p>&

56、lt;b>　　運(yùn)行模式和仿真結(jié)果</b></p><p>　　這種設(shè)計(jì)有兩種運(yùn)行模式：獨(dú)立模式和互補(bǔ)模式。通過(guò)在PWMCON寄存器中設(shè)置相應(yīng)的位CPWM，如圖四所示，用戶可以選擇其中一個(gè)運(yùn)行模式。當(dāng)CPWM設(shè)置為0時(shí)，PWM模式將工作在獨(dú)立模式，COWM設(shè)置為1時(shí)，將工作在互補(bǔ)模式。在這部分兩種模式將分別被詳細(xì)講述，從VCS EDA平臺(tái)的PWM模塊的仿真結(jié)果證明這種設(shè)計(jì)。</p>

57、<p><b>　　獨(dú)立PWM輸出模塊</b></p><p>　　獨(dú)立PWM輸出模塊對(duì)于驅(qū)動(dòng)負(fù)荷很有用，如圖6所示。當(dāng)在PWMCON寄存器中相應(yīng)的CP位設(shè)置為0，特殊的PWM輸出模塊是在獨(dú)立的輸出模式里。在這種情況下，PWM的兩種通道輸出是相互獨(dú)立的。在PWM0/PWML口的信號(hào)是從PWM0電機(jī)產(chǎn)生的。通道選擇邏輯完成單獨(dú)情況，如圖6所示。PWM I/O口通過(guò)默認(rèn)意見(jiàn)復(fù)位設(shè)置為獨(dú)

58、立模式，但死區(qū)時(shí)間電機(jī)不能在獨(dú)立模式下工作。仿真結(jié)果如圖6所示。Tr4和Tr3分別與PWM0和PWM1相連，實(shí)際上，從圖看，單片機(jī)的P1[5]/P[4]口被用做PWMH/PWML或是一般的I/O口。</p><p>　　圖6 獨(dú)立模式下的PWM波形</p><p><b>　　互補(bǔ)PWM輸出模式</b></p><p>　　互補(bǔ)輸出模式可

59、以用于驅(qū)動(dòng)逆變器負(fù)載，如圖7所示。這種逆變器拓?fù)鋵W(xué)是典型的直流裝置。在互補(bǔ)輸出模式，PWM的兩個(gè)輸出不能同時(shí)用。PWM通道和輸出口都是通過(guò)通道選擇邏輯內(nèi)部配置的，如圖7所示。死區(qū)時(shí)間是在兩端輸出的開關(guān)裝置沒(méi)有工作的短時(shí)期時(shí)可以選擇插入的。</p><p>　　圖7 PWM互補(bǔ)輸出的典型電路</p><p>　　PWM I/O口通過(guò)在PWMCON中設(shè)置適當(dāng)?shù)腃PWM位選擇互補(bǔ)模式，在這

60、種情況下，PSWL是有效果的。當(dāng)PSEL設(shè)置為0時(shí)，PWMH和PWML將來(lái)自PWM0電機(jī)，這時(shí)來(lái)自PWM1電機(jī)的信號(hào)是沒(méi)用的，而當(dāng)PSEL設(shè)置為1時(shí)，PWMH和PWML將來(lái)自PWM1電機(jī)，這時(shí)來(lái)自PWM0電機(jī)的信號(hào)是沒(méi)用的。在互補(bǔ)模式時(shí)產(chǎn)生PWM輸出信號(hào)的過(guò)程中，死區(qū)時(shí)間將被插入在以下這部分講述。</p><p><b>　　死區(qū)時(shí)間控制</b></p><p>　　

61、當(dāng)PWM I/O口在互補(bǔ)輸出模式運(yùn)行時(shí)，死區(qū)時(shí)間是自動(dòng)啟用生成的，因?yàn)殡娫摧敵鲅b置不能瞬間開關(guān)，在互補(bǔ)對(duì)模式下，一個(gè)PWM輸出的關(guān)閉與其它晶體管打開之間要一定的時(shí)間，2輸出的PWM模塊有一個(gè)帶有8位寄存器的可編程死區(qū)時(shí)間。 </p><p>　　PWM模塊的互補(bǔ)輸出對(duì)已有一個(gè)用于產(chǎn)生死區(qū)時(shí)間插入的8位計(jì)數(shù)器。死區(qū)時(shí)間單元有一個(gè)上升沿和下降沿探測(cè)器，而這個(gè)探測(cè)器與PWM電機(jī)產(chǎn)生的PWM信號(hào)連接。當(dāng)?shù)竭_(dá)PWM邊沿時(shí)

62、，死區(qū)時(shí)間被載入計(jì)時(shí)器，根據(jù)是否是上升沿或下降沿，在互補(bǔ)輸出端口上的其中一個(gè)過(guò)度被延遲，直到計(jì)數(shù)器降為0。PWM輸出對(duì)的死區(qū)時(shí)間表，如圖8a所示：</p><p>　　圖8a 死區(qū)時(shí)間單元模塊圖</p><p>　　圖8b 互補(bǔ)模式的PWM輸出波形</p><p><b>　　總 結(jié)：</b></p><p&g