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1、LM1881, LM1881-X Video Sync SeparatorGeneral Description The LM1881 Video sync separator extracts timing information including composite and vertical sync, burst/back porch timin

2、g, and odd/even field information from standard negative going sync NTSC, PAL* and SECAM video signals with amplitude from 0.5V to 2V p-p. The integrated circuit is also capable of providing sync separation for non-stand

3、ard,faster horizontal rate video signals. The vertical output is produced on the rising edge of the first serration in the vertical sync period. A default vertical output is produced after a time delay if the rising edge

4、 mentioned above does not occur within the externally set delay period, such as might be the case for a non-standard video signal.Features? AC coupled composite input signal? >10 k? input resistance? <10 mA power s

5、upply drain current? Composite sync and vertical outputs? Odd/even field output? Burst gate/back porch output? Horizontal scan rates to 150 kHz? Edge triggered vertical output? Default triggered vertical output for non-s

6、tandard video signal (video games-home computers) ? -40?C to +85?C operation (LM1881-X)Application NotesThe LM1881 is designed to strip the synchronization signals from composite video sources that are in, or similar to,

7、 the N.T.S.C. format. Input signals with positive polarity video (increasing signal voltage signifies increasing scene brightness) from 0.5V (p-p) to 2V (p-p) can be accommodated. The LM1881 operates from a single supply

8、 voltage between 5V DC and 12V DC. The only required external components besides a power supply decoupling capacitor at pin 8 and a set current decoupling capacitor at pin 6, are the composite input coupling capacitor at

9、 pin 2 and one resistor at pin 6 that sets internal current levels. The resistor on pin 6 (i.e. Rset) allows the however, any subcarrier content in the signal will be attenuated by almost 18 dB,effectively taking it belo

10、w the comparator threshold. Filtering will also help if the source is contaminated with thermal noise. The output waveforms will become delayed from between 40 ns to as much as 200 ns due to this filter. This much delay

11、will not usually be significant but it does contribute to the sync delay produced by any additional signal processing. Since the original video may also undergo processing, the need for time delay correction will depend

12、on the total system, not just the sync stripper.VERTICAL SYNC OUTPUTA vertical sync output is derived by internally integrating the composite sync waveform (Figure 2). To understand the generation of the vertical sync pu

13、lse, refer to the lower left hand section Figure2. Note that there are two comparators in the section. One comparator has an internally generated voltage reference called V1 going to one of its inputs. The other comparat

14、or has an internally generated voltage reference called V2 going to one of its inputs. Both comparators have a common input at their noninverting input coming from the internal integrator. The internal integrator is used

15、 for integrating the composite sync signal. This signal comes from the input side of the composite sync buffer and are positive going sync pulses. The capacitor to the integrator is internal to the LM1881. The capacitor

16、charge current is set by the value of the external resistor RSET. The output of the integrator is going to be at a low voltage during the normal horizontal lines because the integrator has a very short time to charge the

17、 capacitor, which is during the horizontal sync period. The equalization pulses will keep the output voltage of the integrator at about the same level, below the V1 During the vertical sync period the narrow going positi

18、ve pulses shown in Figure 1 is called the serration pulse. The wide negative portion of the vertical sync period is called the vertical sync pulse. At the start of the vertical sync period,before the first Serration puls

19、e occurs, the integrator now charges the capacitor to a much higher voltage. At the first serration pulse the integrator output should be between V1 and V2. This would give a high level at the output of the comparator wi

20、th V1 as one of its inputs. This high is clocked into the “D” flip-flop by the falling edge of the serration pulse (remember the sync signal is inverted in this section of the LM1881). The “Q” output of the “D” flip-flop

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